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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-01 14:49:46 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-01 14:49:46 +0000 |
| commit | b083570532a01dad87524b99b86543371b595415 (patch) | |
| tree | b8993edaf69aee95d862da880952262e7761f1ce /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | 50f43e4168dff15519532240de5afdbb07d4b8b7 (diff) | |
| download | bcm5719-llvm-b083570532a01dad87524b99b86543371b595415.tar.gz bcm5719-llvm-b083570532a01dad87524b99b86543371b595415.zip | |
DAG: Remove pointless type check
These are only integer operations.
llvm-svn: 304417
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index d6aec69bbf1..b1df262a184 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1960,7 +1960,7 @@ SDValue DAGCombiner::visitADD(SDNode *N) { // fold (a+b) -> (a|b) iff a and b share no bits. if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) && - VT.isInteger() && DAG.haveNoCommonBitsSet(N0, N1)) + DAG.haveNoCommonBitsSet(N0, N1)) return DAG.getNode(ISD::OR, DL, VT, N0, N1); if (SDValue Combined = visitADDLike(N0, N1, N)) |
