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| author | Dan Gohman <gohman@apple.com> | 2010-11-09 01:54:35 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2010-11-09 01:54:35 +0000 |
| commit | 5db892142264b0840edb990653d0444fee20130d (patch) | |
| tree | 74f53da71d3c2ecef9980373d7e829ecc38f854a /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | 4677bafd8586a6c491e37e6fc1a1afdb8b154195 (diff) | |
| download | bcm5719-llvm-5db892142264b0840edb990653d0444fee20130d.tar.gz bcm5719-llvm-5db892142264b0840edb990653d0444fee20130d.zip | |
Fix DAGCombiner to avoid folding a sext-in-reg or similar through a shl
in order to fold it into a load.
llvm-svn: 118471
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 7154d9d691c..1a0f503378d 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -4120,6 +4120,7 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) { // we can fold the truncate through the shift. unsigned ShLeftAmt = 0; if (ShAmt == 0 && N0.getOpcode() == ISD::SHL && N0.hasOneUse() && + ExtVT == VT && TLI.isNarrowingProfitable(N0.getValueType(), VT)) { if (ConstantSDNode *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { ShLeftAmt = N01->getZExtValue(); |
