diff options
author | Craig Topper <craig.topper@gmail.com> | 2017-01-29 04:38:21 +0000 |
---|---|---|
committer | Craig Topper <craig.topper@gmail.com> | 2017-01-29 04:38:21 +0000 |
commit | 4753736abfe807e623b0b327d32a78d23d770c08 (patch) | |
tree | aaadebcc35d8bb9325d90b81864a6e41ef7d1225 /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
parent | d15730902bcd0dcdc8c262ef30e470838247c1e4 (diff) | |
download | bcm5719-llvm-4753736abfe807e623b0b327d32a78d23d770c08.tar.gz bcm5719-llvm-4753736abfe807e623b0b327d32a78d23d770c08.zip |
[DAGCombiner] Use unsigned for a constant vector index instead of APInt.
The type system requires that the number of vector elements should fit in 32-bits so this should be safe.
llvm-svn: 293414
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 3ef801f52a4..33863ca16f9 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -14543,8 +14543,8 @@ SDValue DAGCombiner::visitINSERT_SUBVECTOR(SDNode *N) { // If the input vector is a concatenation, and the insert replaces // one of the halves, we can optimize into a single concat_vectors. if (N0.getOpcode() == ISD::CONCAT_VECTORS && N0->getNumOperands() == 2 && - N2.getOpcode() == ISD::Constant) { - APInt InsIdx = cast<ConstantSDNode>(N2)->getAPIntValue(); + isa<ConstantSDNode>(N2)) { + unsigned InsIdx = cast<ConstantSDNode>(N2)->getZExtValue(); // Lower half: fold (insert_subvector (concat_vectors X, Y), Z) -> // (concat_vectors Z, Y) |