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author | Sanjay Patel <spatel@rotateright.com> | 2015-08-16 17:54:28 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2015-08-16 17:54:28 +0000 |
commit | 3ab4a73bac6c5141828f40e0f173b38b4ba5fde0 (patch) | |
tree | e4abe9a9fa47b2454f111ea09954db243cf27ad5 /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
parent | eca5282dd04884349c1e6cd89d091e471ac63153 (diff) | |
download | bcm5719-llvm-3ab4a73bac6c5141828f40e0f173b38b4ba5fde0.tar.gz bcm5719-llvm-3ab4a73bac6c5141828f40e0f173b38b4ba5fde0.zip |
use SDValue bool operator; NFCI
llvm-svn: 245181
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index f2e4e6ba240..585cff0de0b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -4972,10 +4972,9 @@ SDValue DAGCombiner::visitSELECT(SDNode *N) { DAG.isKnownNeverNaN(N1) && DAG.isKnownNeverNaN(N2)) { ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get(); - SDValue FMinMax = - combineMinNumMaxNum(SDLoc(N), VT, N0.getOperand(0), N0.getOperand(1), - N1, N2, CC, TLI, DAG); - if (FMinMax) + if (SDValue FMinMax = combineMinNumMaxNum(SDLoc(N), VT, N0.getOperand(0), + N0.getOperand(1), N1, N2, CC, + TLI, DAG)) return FMinMax; } |