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authorChris Lattner <sabre@nondot.org>2005-09-19 06:56:21 +0000
committerChris Lattner <sabre@nondot.org>2005-09-19 06:56:21 +0000
commit2f838f2192efa710de7024662200b36aa90392b0 (patch)
treedae02a5a02a90ffa31f13d3e6d069917f14a1aa8 /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
parentde3c87a2ab88e5cedac5a27901158cd6172d6c09 (diff)
downloadbcm5719-llvm-2f838f2192efa710de7024662200b36aa90392b0.tar.gz
bcm5719-llvm-2f838f2192efa710de7024662200b36aa90392b0.zip
Teach the local spiller to turn stack slot loads into register-register copies
when possible, avoiding the load (and avoiding the copy if the value is already in the right register). This patch came about when I noticed code like the following being generated: store R17 -> [SS1] ...blah... R4 = load [SS1] This was causing an LSU reject on the G5. This problem was due to the register allocator folding spill code into a reg-reg copy (producing the load), which prevented the spiller from being able to rewrite the load into a copy, despite the fact that the value was already available in a register. In the case above, we now rip out the R4 load and replace it with a R4 = R17 copy. This speeds up several programs on X86 (which spills a lot :) ), e.g. smg2k from 22.39->20.60s, povray from 12.93->12.66s, 168.wupwise from 68.54->53.83s (!), 197.parser from 7.33->6.62s (!), etc. This may have a larger impact in some cases on the G5 (by avoiding LSU rejects), though it probably won't trigger as often (less spilling in general). Targets that implement folding of loads/stores into copies should implement the isLoadFromStackSlot hook to get this. llvm-svn: 23388
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
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