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| author | Owen Anderson <resistor@mac.com> | 2013-04-23 18:09:28 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2013-04-23 18:09:28 +0000 |
| commit | 2d4cca35c385e4ac9d6e4b7c7db0f8a5f289f929 (patch) | |
| tree | d55cee9cbca3f76c3de2b91ae95f40798b82005d /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | a4f8741cfaa8fc753de36e5ace4aa356f713cf4f (diff) | |
| download | bcm5719-llvm-2d4cca35c385e4ac9d6e4b7c7db0f8a5f289f929.tar.gz bcm5719-llvm-2d4cca35c385e4ac9d6e4b7c7db0f8a5f289f929.zip | |
DAGCombine should not aggressively fold SEXT(VSETCC(...)) into a wider VSETCC without first checking the target's vector boolean contents.
This exposed an issue with PowerPC AltiVec where it appears it was setting the wrong vector boolean contents. The included change
fixes the PowerPC tests, and was OK'd by Hal.
llvm-svn: 180129
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 3b823ad9b6c..f67cd3e2709 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -4451,7 +4451,9 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) { if (N0.getOpcode() == ISD::SETCC) { // sext(setcc) -> sext_in_reg(vsetcc) for vectors. // Only do this before legalize for now. - if (VT.isVector() && !LegalOperations) { + if (VT.isVector() && !LegalOperations && + TLI.getBooleanContents(true) == + TargetLowering::ZeroOrNegativeOneBooleanContent) { EVT N0VT = N0.getOperand(0).getValueType(); // On some architectures (such as SSE/NEON/etc) the SETCC result type is // of the same size as the compared operands. Only optimize sext(setcc()) |
