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| author | Diogo N. Sampaio <diogo.sampaio@arm.com> | 2018-07-06 10:09:04 +0000 |
|---|---|---|
| committer | Diogo N. Sampaio <diogo.sampaio@arm.com> | 2018-07-06 10:09:04 +0000 |
| commit | 17be9949428b8d4273d04398a6f21ccff5bb4ecc (patch) | |
| tree | 8c48ad1d49f8125e4bd759d563c65333d388e5b0 /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | 00f43c959d420a6c64ac14288dde630bb3b1f3bd (diff) | |
| download | bcm5719-llvm-17be9949428b8d4273d04398a6f21ccff5bb4ecc.tar.gz bcm5719-llvm-17be9949428b8d4273d04398a6f21ccff5bb4ecc.zip | |
Added missing semicolon
llvm-svn: 336428
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 93eaf1ed168..59c9026ebdd 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -6023,8 +6023,7 @@ SDValue DAGCombiner::foldRedundantShiftedMasks(SDNode *AND) { break; } else // Same as SRL N0Opcode = ISD::SRL; - LLVM_FALLTHROUGH - /* fall-through */ + LLVM_FALLTHROUGH; case ISD::SRL: CanReduce = (EffectiveOtherMask.lshr(ShiftValue) == EffectiveMask) || (EffectiveMask.shl(ShiftValue) == EffectiveOtherMask); |
