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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-28 11:00:12 -0700 |
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committer | Matt Arsenault <arsenm2@gmail.com> | 2019-10-31 07:51:38 -0700 |
commit | 1725f2884175ca618d29b06e35f5c6ebd618053d (patch) | |
tree | cdb06decf1ce6352e3da55ff9233279e448ac3fd /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
parent | bc56166281ae025fcbe701bdb3a02b488bcedc09 (diff) | |
download | bcm5719-llvm-1725f2884175ca618d29b06e35f5c6ebd618053d.tar.gz bcm5719-llvm-1725f2884175ca618d29b06e35f5c6ebd618053d.zip |
DAG: Add new control for ISD::FMAD formation
For AMDGPU this depends on whether denormals are enabled in the
default FP mode for the function. Currently this is treated as a
subtarget feature, so FMAD is selectively legal based on that. I want
to move this out of the subtarget features so this can be controlled
with a denormal mode attribute. Additionally, this will allow folding
based on a future ftz fast math flag.
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 5003c8f0536..e9fb560e858 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -11330,7 +11330,7 @@ SDValue DAGCombiner::visitFADDForFMACombine(SDNode *N) { const TargetOptions &Options = DAG.getTarget().Options; // Floating-point multiply-add with intermediate rounding. - bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); + bool HasFMAD = (LegalOperations && TLI.isFMADLegalForFAddFSub(DAG, N)); // Floating-point multiply-add without intermediate rounding. bool HasFMA = @@ -11541,7 +11541,7 @@ SDValue DAGCombiner::visitFSUBForFMACombine(SDNode *N) { const TargetOptions &Options = DAG.getTarget().Options; // Floating-point multiply-add with intermediate rounding. - bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); + bool HasFMAD = (LegalOperations && TLI.isFMADLegalForFAddFSub(DAG, N)); // Floating-point multiply-add without intermediate rounding. bool HasFMA = |