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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-03 14:25:46 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-03 14:25:46 +0000 |
| commit | 10754abe7eecb0aec4627da386e04d7d6d06d56f (patch) | |
| tree | 690e42a130c89b6ad059354c780bfa40db0ac4c1 /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | 4438bf749874c933c37b564ceb75581e9352ed5f (diff) | |
| download | bcm5719-llvm-10754abe7eecb0aec4627da386e04d7d6d06d56f.tar.gz bcm5719-llvm-10754abe7eecb0aec4627da386e04d7d6d06d56f.zip | |
Use APInt::getOneBitSet instead of APInt::getBitsSet for sign bit mask creation
Avoids all the unnecessary extra bitrange creation/shift stages.
llvm-svn: 296871
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 52551e7833c..8ac41197b62 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -7702,7 +7702,7 @@ SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) { } // fold (sext_in_reg x) -> (zext_in_reg x) if the sign bit is known zero. - if (DAG.MaskedValueIsZero(N0, APInt::getBitsSet(VTBits, EVTBits-1, EVTBits))) + if (DAG.MaskedValueIsZero(N0, APInt::getOneBitSet(VTBits, EVTBits - 1))) return DAG.getZeroExtendInReg(N0, SDLoc(N), EVT.getScalarType()); // fold operands of sext_in_reg based on knowledge that the top bits are not |
