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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-11-06 21:58:37 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-11-06 21:58:37 +0000 |
| commit | 05691a678ed6d76c1d022bfb49ab38f4a0ec1966 (patch) | |
| tree | becb3cf95bd1b784213d5e8f70d4678747bdd73f /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | e73a0601bd1f208d4b4e30ffa6f53775e8c92f6c (diff) | |
| download | bcm5719-llvm-05691a678ed6d76c1d022bfb49ab38f4a0ec1966.tar.gz bcm5719-llvm-05691a678ed6d76c1d022bfb49ab38f4a0ec1966.zip | |
DAGCombiner: Check shouldReduceLoadWidth before combining (and (load), x) -> extload
Reviewers: resistor, arsenm
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D13805
llvm-svn: 252349
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index a790282fada..a1ea6d829f6 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3206,7 +3206,8 @@ SDValue DAGCombiner::visitAND(SDNode *N) { // be expensive (and would be wrong if the type is not byte sized). if (!LN0->isVolatile() && LoadedVT.bitsGT(ExtVT) && ExtVT.isRound() && (!LegalOperations || TLI.isLoadExtLegal(ISD::ZEXTLOAD, LoadResultTy, - ExtVT))) { + ExtVT)) && + TLI.shouldReduceLoadWidth(LN0, ISD::ZEXTLOAD, ExtVT)) { EVT PtrType = LN0->getOperand(1).getValueType(); unsigned Alignment = LN0->getAlignment(); |
