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author | Evan Cheng <evan.cheng@apple.com> | 2007-05-03 23:52:19 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-05-03 23:52:19 +0000 |
commit | 044a0a8cfbe8f8a6cc9fd658497707af110c3a69 (patch) | |
tree | 4b11d5a05964cd1b5cd31883815250596ce5ee4d /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
parent | 23040754b0f984b05b6aedc312ffc8dfa1c62df2 (diff) | |
download | bcm5719-llvm-044a0a8cfbe8f8a6cc9fd658497707af110c3a69.tar.gz bcm5719-llvm-044a0a8cfbe8f8a6cc9fd658497707af110c3a69.zip |
Don't create indexed load / store with zero offset!
llvm-svn: 36716
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 5977e88ee13..8396e45be30 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3110,6 +3110,10 @@ bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) { ISD::MemIndexedMode AM = ISD::UNINDEXED; if (!TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG)) return false; + // Don't create a indexed load / store with zero offset. + if (isa<ConstantSDNode>(Offset) && + cast<ConstantSDNode>(Offset)->getValue() == 0) + return false; // Try turning it into a pre-indexed load / store except when: // 1) The base is a frame index. @@ -3239,6 +3243,10 @@ bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) { std::swap(BasePtr, Offset); if (Ptr != BasePtr) continue; + // Don't create a indexed load / store with zero offset. + if (isa<ConstantSDNode>(Offset) && + cast<ConstantSDNode>(Offset)->getValue() == 0) + continue; // Try turning it into a post-indexed load / store except when // 1) All uses are load / store ops that use it as base ptr. |