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authorSimon Pilgrim <llvm-dev@redking.me.uk>2019-04-03 11:00:55 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2019-04-03 11:00:55 +0000
commit02599de2e1e9688ed74e2d1080c4e4f73c6072af (patch)
tree4eba84b3ab70f12996df8bf0619f283392712550 /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
parenteb9ae56157d7ca5211a61688ffc429dfb1e1f0f5 (diff)
downloadbcm5719-llvm-02599de2e1e9688ed74e2d1080c4e4f73c6072af.tar.gz
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[DAGCombine] Don't use getZExtValue() until we know the constant is in range.
Noticed during prep for a patch for PR40758. llvm-svn: 357571
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index e58e8353617..93d5bce9abf 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -6843,8 +6843,8 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
if (N1C && N0.getOpcode() == ISD::SRL && N0.hasOneUse() &&
TLI.shouldFoldShiftPairToMask(N, Level)) {
if (ConstantSDNode *N0C1 = isConstOrConstSplat(N0.getOperand(1))) {
- uint64_t c1 = N0C1->getZExtValue();
- if (c1 < OpSizeInBits) {
+ if (N0C1->getAPIntValue().ult(OpSizeInBits)) {
+ uint64_t c1 = N0C1->getZExtValue();
uint64_t c2 = N1C->getZExtValue();
APInt Mask = APInt::getHighBitsSet(OpSizeInBits, OpSizeInBits - c1);
SDValue Shift;
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