diff options
| author | Preston Gurd <preston.gurd@intel.com> | 2013-02-01 20:41:27 +0000 |
|---|---|---|
| committer | Preston Gurd <preston.gurd@intel.com> | 2013-02-01 20:41:27 +0000 |
| commit | 25c3b6acc04c3c4eec063b349d73779e523b9d37 (patch) | |
| tree | c83c8d0b0c0fff207134c582b471230cba69f155 /llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | |
| parent | a364782a157f44247fd74293b568d6f76c552d14 (diff) | |
| download | bcm5719-llvm-25c3b6acc04c3c4eec063b349d73779e523b9d37.tar.gz bcm5719-llvm-25c3b6acc04c3c4eec063b349d73779e523b9d37.zip | |
This patch aims to improve compile time performance by increasing
the SCEV vector size in LoopStrengthReduce. It is observed that
the BaseRegs vector size is 4 in most cases,
and elements are frequently copied when it is initialized as
SmallVector<const SCEV *, 2> BaseRegs.
Our benchmark results show that the compilation time performance
improved by ~0.5%.
Patch by Wan Xiaofei.
llvm-svn: 174219
Diffstat (limited to 'llvm/lib/CodeGen/ScheduleDAGInstrs.cpp')
0 files changed, 0 insertions, 0 deletions
