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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-08-26 20:47:50 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-08-26 20:47:50 +0000 |
| commit | f003c38e1e879d483ade3715698fecfcfd84cdd0 (patch) | |
| tree | 4e2634f005deac0d5e31df5ff0b40d5730dde1a9 /llvm/lib/CodeGen/RegisterCoalescer.h | |
| parent | b85b4079f1c52be5ee2f6a1f218bf551c3983780 (diff) | |
| download | bcm5719-llvm-f003c38e1e879d483ade3715698fecfcfd84cdd0.tar.gz bcm5719-llvm-f003c38e1e879d483ade3715698fecfcfd84cdd0.zip | |
AMDGPU: Don't create intermediate SALU instructions
When splitting 64-bit operations, create the correct
VALU instructions immediately.
This was splitting things like s_or_b64 into the two
s_or_b32s and then pushing the new instructions
onto the worklist. There's no reason we need
to do this intermediate step.
llvm-svn: 246077
Diffstat (limited to 'llvm/lib/CodeGen/RegisterCoalescer.h')
0 files changed, 0 insertions, 0 deletions
