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| author | James Y Knight <jyknight@google.com> | 2017-01-13 19:08:36 +0000 |
|---|---|---|
| committer | James Y Knight <jyknight@google.com> | 2017-01-13 19:08:36 +0000 |
| commit | 99a2ce2af239ca0eb3e78eba08a51ee04ee1fcb5 (patch) | |
| tree | c9cf74cea88e75ca4ba62a6d72da0873a7068ea5 /llvm/lib/CodeGen/RegisterCoalescer.cpp | |
| parent | e65b1029ca5675e482d8e8e172e4d698cd95f361 (diff) | |
| download | bcm5719-llvm-99a2ce2af239ca0eb3e78eba08a51ee04ee1fcb5.tar.gz bcm5719-llvm-99a2ce2af239ca0eb3e78eba08a51ee04ee1fcb5.zip | |
Check for register clobbers when merging a vreg live range with a
reserved physreg in RegisterCoalescer.
Previously, we only checked for clobbers when merging into a READ of
the physreg, but not when merging from a WRITE to the physreg.
Differential Revision: https://reviews.llvm.org/D28527
llvm-svn: 291942
Diffstat (limited to 'llvm/lib/CodeGen/RegisterCoalescer.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/RegisterCoalescer.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp index 0f4bb59c49a..57d5b5013d8 100644 --- a/llvm/lib/CodeGen/RegisterCoalescer.cpp +++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp @@ -1582,6 +1582,14 @@ bool RegisterCoalescer::joinReservedPhysReg(CoalescerPair &CP) { return false; } } + + // We must also check for overlaps with regmask clobbers. + BitVector RegMaskUsable; + if (LIS->checkRegMaskInterference(RHS, RegMaskUsable) && + !RegMaskUsable.test(DstReg)) { + DEBUG(dbgs() << "\t\tRegMask interference\n"); + return false; + } } // Skip any value computations, we are not adding new values to the @@ -1616,14 +1624,6 @@ bool RegisterCoalescer::joinReservedPhysReg(CoalescerPair &CP) { DEBUG(dbgs() << "\t\tInterference (read): " << *MI); return false; } - - // We must also check for clobbers caused by regmasks. - for (const auto &MO : MI->operands()) { - if (MO.isRegMask() && MO.clobbersPhysReg(DstReg)) { - DEBUG(dbgs() << "\t\tInterference (regmask clobber): " << *MI); - return false; - } - } } } |

