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| author | Craig Topper <craig.topper@intel.com> | 2018-10-15 21:51:29 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-10-15 21:51:29 +0000 |
| commit | 548e8b5b47f4937b7c165b8be481466f51d4e529 (patch) | |
| tree | 45ef9a6d1e6d839946c6d682297fa3c1d3210227 /llvm/lib/CodeGen/RegUsageInfoCollector.cpp | |
| parent | 125c54ba10a74cea6c8948ec70af58cf63b00055 (diff) | |
| download | bcm5719-llvm-548e8b5b47f4937b7c165b8be481466f51d4e529.tar.gz bcm5719-llvm-548e8b5b47f4937b7c165b8be481466f51d4e529.zip | |
[X86] Add test cases showing failure to fold load into vpsrlw when EVEX encoded instructions are used.
There's a bad bitcast being used in the isel patterns for the vXi16 shift instructions.
llvm-svn: 344562
Diffstat (limited to 'llvm/lib/CodeGen/RegUsageInfoCollector.cpp')
0 files changed, 0 insertions, 0 deletions
