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authorOwen Anderson <resistor@mac.com>2008-01-01 21:11:32 +0000
committerOwen Anderson <resistor@mac.com>2008-01-01 21:11:32 +0000
commiteee14601b1763a5488c4fce8ab91a80edd8ce73c (patch)
tree07eb1a1d7c8089c61b9c075fe70a1beac8e28e4c /llvm/lib/CodeGen/RegAllocSimple.cpp
parentcaaf8aae4de8a6a6bb2baa8db6d62bc42dff4c98 (diff)
downloadbcm5719-llvm-eee14601b1763a5488c4fce8ab91a80edd8ce73c.tar.gz
bcm5719-llvm-eee14601b1763a5488c4fce8ab91a80edd8ce73c.zip
Move some more instruction creation methods from RegisterInfo into InstrInfo.
llvm-svn: 45484
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocSimple.cpp')
-rw-r--r--llvm/lib/CodeGen/RegAllocSimple.cpp7
1 files changed, 5 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/RegAllocSimple.cpp b/llvm/lib/CodeGen/RegAllocSimple.cpp
index a60c63c28e4..7ea96233037 100644
--- a/llvm/lib/CodeGen/RegAllocSimple.cpp
+++ b/llvm/lib/CodeGen/RegAllocSimple.cpp
@@ -144,7 +144,8 @@ unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
// Add move instruction(s)
++NumLoads;
- MRI->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
+ const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
+ TII->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
return PhysReg;
}
@@ -152,11 +153,13 @@ void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
unsigned VirtReg, unsigned PhysReg) {
const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
+ const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
+
int FrameIdx = getStackSpaceFor(VirtReg, RC);
// Add move instruction(s)
++NumStores;
- MRI->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIdx, RC);
+ TII->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIdx, RC);
}
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