Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects

that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674

1 files changed, 2 insertions, 3 deletions

diff --git a/llvm/lib/CodeGen/RegAllocSimple.cpp b/llvm/lib/CodeGen/RegAllocSimple.cpp
index 7ea96233037..33828235777 100644
--- a/llvm/lib/CodeGen/RegAllocSimple.cpp
+++ b/llvm/lib/CodeGen/RegAllocSimple.cpp
@@ -173,8 +173,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
 
     // This is a preliminary pass that will invalidate any registers that are
     // used by the instruction (including implicit uses).
-    unsigned Opcode = MI->getOpcode();
-    const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode);
+    const TargetInstrDescriptor &Desc = *MI->getDesc();
     const unsigned *Regs;
     if (Desc.ImplicitUses) {
       for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
@@ -204,7 +203,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
         unsigned physReg = Virt2PhysRegMap[virtualReg];
         if (physReg == 0) {
           if (op.isDef()) {
-            int TiedOp = MI->getInstrDescriptor()->findTiedToSrcOperand(i);
+            int TiedOp = MI->getDesc()->findTiedToSrcOperand(i);
             if (TiedOp == -1) {
               physReg = getFreeReg(virtualReg);
             } else {