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authorChris Lattner <sabre@nondot.org>2004-07-19 05:02:09 +0000
committerChris Lattner <sabre@nondot.org>2004-07-19 05:02:09 +0000
commit8c8144b958684513811d76c54e9f14dbada1ac57 (patch)
tree41ad86f257ba1948476139a866d8ac6627e6109a /llvm/lib/CodeGen/RegAllocLinearScan.cpp
parent70f8dca59ba76cb4692da7bf122b40a479ce237b (diff)
downloadbcm5719-llvm-8c8144b958684513811d76c54e9f14dbada1ac57.tar.gz
bcm5719-llvm-8c8144b958684513811d76c54e9f14dbada1ac57.zip
Fix assertion to not dereference end!
llvm-svn: 14991
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocLinearScan.cpp')
-rw-r--r--llvm/lib/CodeGen/RegAllocLinearScan.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/RegAllocLinearScan.cpp b/llvm/lib/CodeGen/RegAllocLinearScan.cpp
index 24508fbbb02..dbed7973fc4 100644
--- a/llvm/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/llvm/lib/CodeGen/RegAllocLinearScan.cpp
@@ -399,8 +399,8 @@ void RA::assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur)
std::vector<LiveInterval*>::iterator addedItEnd = added.end();
for (IntervalPtrs::iterator i = unhandled_.begin(), e =unhandled_.end();
i != e && addedIt != addedItEnd; ++i) {
- while ((*i)->start() > (*addedIt)->start() &&
- addedIt != addedItEnd) {
+ while (addedIt != addedItEnd &&
+ (*i)->start() > (*addedIt)->start()) {
#ifndef NDEBUG
// This code only works if addIntervalsForSpills retursn a
// sorted interval list. Assert this is the case now.
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