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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-02-10 18:58:34 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-02-10 18:58:34 +0000 |
| commit | a16ae59722df8a1adf0d0830a4490ea16381bae1 (patch) | |
| tree | 065c05312ccc824c3b4542e4e7d37f13c6fba55f /llvm/lib/CodeGen/RegAllocGreedy.cpp | |
| parent | b7c1715df11a98915d12d7f5f775045444e78b09 (diff) | |
| download | bcm5719-llvm-a16ae59722df8a1adf0d0830a4490ea16381bae1.tar.gz bcm5719-llvm-a16ae59722df8a1adf0d0830a4490ea16381bae1.zip | |
Add register mask support to InterferenceCache.
This makes global live range splitting behave identically with and
without register mask operands.
This is not necessarily the best way of using register masks for live
range splitting. It would be more efficient to first split global live
ranges around calls (i.e., register masks), and reserve the fine grained
per-physreg interference guidance for global live ranges that do not
cross calls.
For now the goal is to produce identical assembly when enabling register
masks.
llvm-svn: 150259
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocGreedy.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocGreedy.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp index e003f32ff5d..0ac31a57920 100644 --- a/llvm/lib/CodeGen/RegAllocGreedy.cpp +++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp @@ -1644,7 +1644,7 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) { ExtraRegInfo.clear(); ExtraRegInfo.resize(MRI->getNumVirtRegs()); NextCascade = 1; - IntfCache.init(MF, &getLiveUnion(0), Indexes, TRI); + IntfCache.init(MF, &getLiveUnion(0), Indexes, LIS, TRI); GlobalCand.resize(32); // This will grow as needed. allocatePhysRegs(); |

