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author | Matthias Braun <matze@braunis.de> | 2015-07-15 22:16:00 +0000 |
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committer | Matthias Braun <matze@braunis.de> | 2015-07-15 22:16:00 +0000 |
commit | 5d1f12d1f5e42cd538a245216529b7cae59d01a0 (patch) | |
tree | 93326a222da006a9568a8b97612451ab1c45ecca /llvm/lib/CodeGen/RegAllocBasic.cpp | |
parent | 37643a04a499a61ad800bcb526fe36e74b0b3636 (diff) | |
download | bcm5719-llvm-5d1f12d1f5e42cd538a245216529b7cae59d01a0.tar.gz bcm5719-llvm-5d1f12d1f5e42cd538a245216529b7cae59d01a0.zip |
TargetRegisterInfo: Provide a way to check assigned registers in getRegAllocationHints()
Pass a const reference to LiveRegMatrix to getRegAllocationHints()
because some targets can prodive better hints if they can test whether a
physreg has been used for register allocation yet.
llvm-svn: 242340
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocBasic.cpp')
-rw-r--r-- | llvm/lib/CodeGen/RegAllocBasic.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp index 0090332a812..d9660541d92 100644 --- a/llvm/lib/CodeGen/RegAllocBasic.cpp +++ b/llvm/lib/CodeGen/RegAllocBasic.cpp @@ -223,7 +223,7 @@ unsigned RABasic::selectOrSplit(LiveInterval &VirtReg, SmallVector<unsigned, 8> PhysRegSpillCands; // Check for an available register in this class. - AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo); + AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix); while (unsigned PhysReg = Order.next()) { // Check for interference in PhysReg switch (Matrix->checkInterference(VirtReg, PhysReg)) { |