diff options
| author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-14 23:24:32 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-14 23:24:32 +0000 |
| commit | 8e5da413743382ffa2a59c29d4890f57e3546bd6 (patch) | |
| tree | b4d5f038d43e343fdd4a51e8bbd2a3b5345d3c2d /llvm/lib/CodeGen/RegAllocBase.cpp | |
| parent | df94dc391724b0f9d94d8d2045757a320ec4d414 (diff) | |
| download | bcm5719-llvm-8e5da413743382ffa2a59c29d4890f57e3546bd6.tar.gz bcm5719-llvm-8e5da413743382ffa2a59c29d4890f57e3546bd6.zip | |
R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
Using REG_SEQUENCE for BUILD_VECTOR rather than a series of INSERT_SUBREG
instructions should make it easier for the register allocator to coalasce
unnecessary copies.
v2:
- Use an SGPR register class if all the operands of BUILD_VECTOR are
SGPRs.
llvm-svn: 188427
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocBase.cpp')
0 files changed, 0 insertions, 0 deletions
