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authorChris Lattner <sabre@nondot.org>2002-10-29 17:08:05 +0000
committerChris Lattner <sabre@nondot.org>2002-10-29 17:08:05 +0000
commit76014b97af563b0912e1267ae115887febb1280d (patch)
tree11b6d06eb57e8178983acbdf88cb6713afe32545 /llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h
parent6d6d87f3f3db69337b48a21911f098c1afa96db9 (diff)
downloadbcm5719-llvm-76014b97af563b0912e1267ae115887febb1280d.tar.gz
bcm5719-llvm-76014b97af563b0912e1267ae115887febb1280d.zip
Remove #include, misleading comment, and a typedef used only once
llvm-svn: 4383
Diffstat (limited to 'llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h')
-rw-r--r--llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h29
1 files changed, 4 insertions, 25 deletions
diff --git a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h
index 12f0bf05ebf..c84ca035211 100644
--- a/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h
+++ b/llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h
@@ -14,17 +14,6 @@
* Machine dependent work: All parts of the register coloring algorithm
except coloring of an individual node are machine independent.
-
- Register allocation must be done as:
-
- FunctionLiveVarInfo LVI(*FunctionI ); // compute LV info
- LVI.analyze();
-
- TargetMachine &target = ....
-
-
- PhyRegAlloc PRA(*FunctionI, target, &LVI); // allocate regs
- PRA.allocateRegisters();
*/
#ifndef PHY_REG_ALLOC_H
@@ -32,7 +21,6 @@
#include "llvm/CodeGen/RegClass.h"
#include "llvm/CodeGen/LiveRangeInfo.h"
-#include <vector>
#include <map>
class MachineFunction;
@@ -55,19 +43,13 @@ struct AddedInstrns {
std::vector<MachineInstr*> InstrnsAfter; //Insts added AFTER an existing inst
};
-typedef std::map<const MachineInstr *, AddedInstrns> AddedInstrMapType;
-
-
-
//----------------------------------------------------------------------------
// class PhyRegAlloc:
// Main class the register allocator. Call allocateRegisters() to allocate
// registers for a Function.
//----------------------------------------------------------------------------
-
class PhyRegAlloc: public NonCopyable {
-
std::vector<RegClass *> RegClassList; // vector of register classes
const TargetMachine &TM; // target machine
const Function *Fn; // name of the function we work on
@@ -79,7 +61,9 @@ class PhyRegAlloc: public NonCopyable {
const unsigned NumOfRegClasses; // recorded here for efficiency
- AddedInstrMapType AddedInstrMap; // to store instrns added in this phase
+ // AddedInstrMap - Used to store instrns added in this phase
+ std::map<const MachineInstr *, AddedInstrns> AddedInstrMap;
+
AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
LoopInfo *LoopDepthCalc; // to calculate loop depths
ReservedColorListType ResColList; // A set of reserved regs if desired.
@@ -105,11 +89,6 @@ public:
private:
-
-
-
- //------- ------------------ private methods---------------------------------
-
void addInterference(const Value *Def, const ValueSet *LVSet,
bool isCallInst);
@@ -140,8 +119,8 @@ private:
void printLabel(const Value *const Val);
void printMachineCode();
- friend class UltraSparcRegInfo;
+ friend class UltraSparcRegInfo; // FIXME: remove this
int getUsableUniRegAtMI(int RegType,
const ValueSet *LVSetBef,
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