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| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2003-05-27 00:05:23 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2003-05-27 00:05:23 +0000 |
| commit | 7366fa1aa6d69a63e016abe7baec035690797f5a (patch) | |
| tree | 1d91f99165555819bf5175f2b889f1285f966936 /llvm/lib/CodeGen/RegAlloc/IGNode.h | |
| parent | 631006ba48ba5c7a4e00f3ced4a3a9d382ba1dad (diff) | |
| download | bcm5719-llvm-7366fa1aa6d69a63e016abe7baec035690797f5a.tar.gz bcm5719-llvm-7366fa1aa6d69a63e016abe7baec035690797f5a.zip | |
(1) Added special register class containing (for now) %fsr.
Fixed spilling of %fcc[0-3] which are part of %fsr.
(2) Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.
(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
and related functions and flags. Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".
llvm-svn: 6341
Diffstat (limited to 'llvm/lib/CodeGen/RegAlloc/IGNode.h')
0 files changed, 0 insertions, 0 deletions
