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| author | Justin Holewinski <jholewinski@nvidia.com> | 2016-05-02 18:12:02 +0000 |
|---|---|---|
| committer | Justin Holewinski <jholewinski@nvidia.com> | 2016-05-02 18:12:02 +0000 |
| commit | 9a6ea2c2566d32a23db43ed9108d6e4c048faf55 (patch) | |
| tree | 74e8618c55f907148d0ecfa74eac53cbfab18d6f /llvm/lib/CodeGen/PseudoSourceValue.cpp | |
| parent | b2bd28128dafe1cbc9e31f230dcd2ded9fd02168 (diff) | |
| download | bcm5719-llvm-9a6ea2c2566d32a23db43ed9108d6e4c048faf55.tar.gz bcm5719-llvm-9a6ea2c2566d32a23db43ed9108d6e4c048faf55.zip | |
[NVPTX] Fix sign/zero-extending ldg/ldu instruction selection
Summary:
We don't have sign-/zero-extending ldg/ldu instructions defined,
so we need to emulate them with explicit CVTs. We were originally
handling the i8 case, but not any other cases.
Fixes PR26185
Reviewers: jingyue, jlebar
Subscribers: jholewinski
Differential Revision: http://reviews.llvm.org/D19615
llvm-svn: 268272
Diffstat (limited to 'llvm/lib/CodeGen/PseudoSourceValue.cpp')
0 files changed, 0 insertions, 0 deletions
