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| author | Andrew Ng <anng.sw@gmail.com> | 2017-04-25 13:39:49 +0000 |
|---|---|---|
| committer | Andrew Ng <anng.sw@gmail.com> | 2017-04-25 13:39:49 +0000 |
| commit | 178c369456a5ad187d6a08e3b269a81300825775 (patch) | |
| tree | 0af3e4ac0b63ffed902dc381bc81b17f69d6f20f /llvm/lib/CodeGen/PostRASchedulerList.cpp | |
| parent | 986d73cc1d9528c3ee360cf128c65788035ebdc9 (diff) | |
| download | bcm5719-llvm-178c369456a5ad187d6a08e3b269a81300825775.tar.gz bcm5719-llvm-178c369456a5ad187d6a08e3b269a81300825775.zip | |
[DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler.
This patch fixes a bug with the updating of DBG_VALUE's in
BreakAntiDependencies. Previously, it would only attempt to update the first
DBG_VALUE following the instruction whose register is being changed,
potentially leaving DBG_VALUE's referring to the wrong register. Now the code
will update all DBG_VALUE's that immediately follow the instruction.
This issue was detected as a result of an optimized codegen difference with
"-g" where an X86 byte/word fixup was not performed due to a DBG_VALUE
referencing the wrong register.
Differential Revision: https://reviews.llvm.org/D31755
llvm-svn: 301309
Diffstat (limited to 'llvm/lib/CodeGen/PostRASchedulerList.cpp')
0 files changed, 0 insertions, 0 deletions
