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authorAndrew Trick <atrick@apple.com>2012-03-14 04:00:41 +0000
committerAndrew Trick <atrick@apple.com>2012-03-14 04:00:41 +0000
commit8823decdd4926861e711075394b954f19c16e18d (patch)
treeb64f642d483d076bf83b86ef243efc6434b94f5c /llvm/lib/CodeGen/Passes.cpp
parent72515bef32d5e17a3fccc9cf4f06bc39d91ee4c6 (diff)
downloadbcm5719-llvm-8823decdd4926861e711075394b954f19c16e18d.tar.gz
bcm5719-llvm-8823decdd4926861e711075394b954f19c16e18d.zip
misched: implemented a framework for top-down or bottom-up scheduling.
New flags: -misched-topdown, -misched-bottomup. They can be used with the default scheduler or with -misched=shuffle. Without either topdown/bottomup flag -misched=shuffle now alternates scheduling direction. LiveIntervals update is unimplemented with bottom-up scheduling, so only -misched-topdown currently works. Capped the ScheduleDAG hierarchy with a concrete ScheduleDAGMI class. ScheduleDAGMI is aware of the top and bottom of the unscheduled zone within the current region. Scheduling policy can be plugged into the ScheduleDAGMI driver by implementing MachineSchedStrategy. ConvergingScheduler is now the default scheduling algorithm. It exercises the new driver but still does no reordering. llvm-svn: 152700
Diffstat (limited to 'llvm/lib/CodeGen/Passes.cpp')
-rw-r--r--llvm/lib/CodeGen/Passes.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/Passes.cpp b/llvm/lib/CodeGen/Passes.cpp
index ec1f2b4c3b2..6246c21566a 100644
--- a/llvm/lib/CodeGen/Passes.cpp
+++ b/llvm/lib/CodeGen/Passes.cpp
@@ -564,7 +564,8 @@ void TargetPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
addPass(RegisterCoalescerID);
// PreRA instruction scheduling.
- addPass(MachineSchedulerID);
+ if (addPass(MachineSchedulerID) != &NoPassID)
+ printAndVerify("After Machine Scheduling");
// Add the selected register allocation pass.
PM.add(RegAllocPass);
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