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| author | Evan Cheng <evan.cheng@apple.com> | 2012-10-02 23:49:13 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2012-10-02 23:49:13 +0000 |
| commit | 214156c43dc1522c22faa730e5c51e192992478b (patch) | |
| tree | 0f662fb99f62456cd45b5f61200c96aefcef8427 /llvm/lib/CodeGen/Passes.cpp | |
| parent | d7e9a450eb4b3eb4c97408764b1bbad796bc6941 (diff) | |
| download | bcm5719-llvm-214156c43dc1522c22faa730e5c51e192992478b.tar.gz bcm5719-llvm-214156c43dc1522c22faa730e5c51e192992478b.zip | |
Fix a serious X86 instruction selection bug. In
X86DAGToDAGISel::PreprocessISelDAG(), isel is moving load inside
callseq_start / callseq_end so it can be folded into a call. This can
create a cycle in the DAG when the call is glued to a copytoreg. We
have been lucky this hasn't caused too many issues because the pre-ra
scheduler has special handling of call sequences. However, it has
caused a crash in a specific tailcall case.
rdar://12393897
llvm-svn: 165072
Diffstat (limited to 'llvm/lib/CodeGen/Passes.cpp')
0 files changed, 0 insertions, 0 deletions
