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authorChris Lattner <sabre@nondot.org>2004-07-23 05:27:43 +0000
committerChris Lattner <sabre@nondot.org>2004-07-23 05:27:43 +0000
commit2d75978bc6db5420a9f34ddbad05886f7b30be67 (patch)
treebd4ad619df921993338c9a1aad6315656ab7b276 /llvm/lib/CodeGen/PHIElimination.cpp
parentb549420cd01fbf7a594ac24c5445d7238e84e656 (diff)
downloadbcm5719-llvm-2d75978bc6db5420a9f34ddbad05886f7b30be67.tar.gz
bcm5719-llvm-2d75978bc6db5420a9f34ddbad05886f7b30be67.zip
Update live intervals more accurately for PHI elim. This slightly reduces
the live intervals for some registers. llvm-svn: 15125
Diffstat (limited to 'llvm/lib/CodeGen/PHIElimination.cpp')
-rw-r--r--llvm/lib/CodeGen/PHIElimination.cpp16
1 files changed, 6 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp
index ebb3ae2b383..4df9a92bb45 100644
--- a/llvm/lib/CodeGen/PHIElimination.cpp
+++ b/llvm/lib/CodeGen/PHIElimination.cpp
@@ -131,18 +131,9 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
std::pair<LiveVariables::killed_iterator, LiveVariables::killed_iterator>
RKs = LV->killed_range(MPhi);
std::vector<std::pair<MachineInstr*, unsigned> > Range;
- if (RKs.first != RKs.second) {
- // Copy the range into a vector...
- Range.assign(RKs.first, RKs.second);
-
- // Delete the range...
+ if (RKs.first != RKs.second) // Delete the range.
LV->removeVirtualRegistersKilled(RKs.first, RKs.second);
- // Add all of the kills back, which will update the appropriate info...
- for (unsigned i = 0, e = Range.size(); i != e; ++i)
- LV->addVirtualRegisterKilled(Range[i].second, PHICopy);
- }
-
RKs = LV->dead_range(MPhi);
if (RKs.first != RKs.second) {
// Works as above...
@@ -252,6 +243,11 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
if (!ValueIsLive) {
MachineBasicBlock::iterator Prev = prior(I);
LV->addVirtualRegisterKilled(SrcReg, Prev);
+
+ // This vreg no longer lives all of the way through opBlock.
+ unsigned opBlockNum = opBlock.getNumber();
+ if (opBlockNum < InRegVI.AliveBlocks.size())
+ InRegVI.AliveBlocks[opBlockNum] = false;
}
}
}
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