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author | James Molloy <jmolloy@google.com> | 2019-10-03 17:10:32 +0000 |
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committer | James Molloy <jmolloy@google.com> | 2019-10-03 17:10:32 +0000 |
commit | 9972c992ebeee3fba63141ac8e3db46e2117cb7d (patch) | |
tree | f7b7876fabef5f0bcecb62e840a44b2668c57979 /llvm/lib/CodeGen/ModuloSchedule.cpp | |
parent | b44204c77e63fcb02af46a9cf830fa23ac4cfc64 (diff) | |
download | bcm5719-llvm-9972c992ebeee3fba63141ac8e3db46e2117cb7d.tar.gz bcm5719-llvm-9972c992ebeee3fba63141ac8e3db46e2117cb7d.zip |
[ModuloSchedule] removeBranch() *before* creating the trip count condition
The Hexagon code assumes there's no existing terminator when inserting its
trip count condition check.
This causes swp-stages5.ll to break. The generated code looks good to me,
it is likely a permutation. I have disabled the new codegen path to keep
everything green and will investigate along with the other 3-4 tests
that have different codegen.
Fixes expensive-checks build.
llvm-svn: 373629
Diffstat (limited to 'llvm/lib/CodeGen/ModuloSchedule.cpp')
-rw-r--r-- | llvm/lib/CodeGen/ModuloSchedule.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp index 30aa81487c8..d891d644664 100644 --- a/llvm/lib/CodeGen/ModuloSchedule.cpp +++ b/llvm/lib/CodeGen/ModuloSchedule.cpp @@ -1772,12 +1772,12 @@ void PeelingModuloScheduleExpander::fixupBranches() { MachineBasicBlock *Fallthrough = *Prolog->succ_begin(); MachineBasicBlock *Epilog = *EI; SmallVector<MachineOperand, 4> Cond; + TII->removeBranch(*Prolog); Optional<bool> StaticallyGreater = Info->createTripCountGreaterCondition(TC, *Prolog, Cond); if (!StaticallyGreater.hasValue()) { LLVM_DEBUG(dbgs() << "Dynamic: TC > " << TC << "\n"); // Dynamically branch based on Cond. - TII->removeBranch(*Prolog); TII->insertBranch(*Prolog, Epilog, Fallthrough, Cond, DebugLoc()); } else if (*StaticallyGreater == false) { LLVM_DEBUG(dbgs() << "Static-false: TC > " << TC << "\n"); @@ -1788,7 +1788,6 @@ void PeelingModuloScheduleExpander::fixupBranches() { P.RemoveOperand(2); P.RemoveOperand(1); } - TII->removeBranch(*Prolog); TII->insertUnconditionalBranch(*Prolog, Epilog, DebugLoc()); KernelDisposed = true; } else { |