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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-11 22:12:43 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-11 22:12:43 +0000 |
commit | b2d245771ff9ff64a65af8dcedc319b6aeebe7ea (patch) | |
tree | 4763f080921dc194eaa64e95ff90d5f49add04ed /llvm/lib/CodeGen/MachineVerifier.cpp | |
parent | f4a369596f7b9b27de54a3277daf115cb9115a2b (diff) | |
download | bcm5719-llvm-b2d245771ff9ff64a65af8dcedc319b6aeebe7ea.tar.gz bcm5719-llvm-b2d245771ff9ff64a65af8dcedc319b6aeebe7ea.zip |
GlobalISel: Verify G_EXTRACT
llvm-svn: 353759
Diffstat (limited to 'llvm/lib/CodeGen/MachineVerifier.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineVerifier.cpp | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index 45fe64e45ba..280283f939f 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -1261,6 +1261,28 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) { break; } + case TargetOpcode::G_EXTRACT: { + const MachineOperand &SrcOp = MI->getOperand(1); + if (!SrcOp.isReg()) { + report("extract source must be a register", MI); + break; + } + + const MachineOperand &OffsetOp = MI->getOperand(2); + if (!OffsetOp.isImm()) { + report("extract offset must be a constant", MI); + break; + } + + unsigned DstSize = MRI->getType(MI->getOperand(0).getReg()).getSizeInBits(); + unsigned SrcSize = MRI->getType(SrcOp.getReg()).getSizeInBits(); + if (SrcSize == DstSize) + report("extract source must be larger than result", MI); + + if (DstSize + OffsetOp.getImm() > SrcSize) + report("extract reads past end of register", MI); + break; + } default: break; } |