summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/MachineSink.cpp
diff options
context:
space:
mode:
authoralex-t <alexander.timofeev@amd.com>2019-12-17 15:20:32 +0300
committeralex-t <alexander.timofeev@amd.com>2019-12-17 15:20:43 +0300
commite7f585ed6109b1f20131b91af87e3c2ae1e59616 (patch)
treeac796d09fb77ae2902dea8964faa99b09b34062a /llvm/lib/CodeGen/MachineSink.cpp
parent3d3e4076cd65007007ca639d4f99c0fa671c9f8e (diff)
downloadbcm5719-llvm-e7f585ed6109b1f20131b91af87e3c2ae1e59616.tar.gz
bcm5719-llvm-e7f585ed6109b1f20131b91af87e3c2ae1e59616.zip
PostRA Machine Sink should take care of COPY defining register that is a sub-register by another COPY source operand
Differential Revision: https://reviews.llvm.org/D71132
Diffstat (limited to 'llvm/lib/CodeGen/MachineSink.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineSink.cpp10
1 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 6900c195e0e..a4ba197b7a1 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -1215,10 +1215,14 @@ static void updateLiveIn(MachineInstr *MI, MachineBasicBlock *SuccBB,
for (MCSubRegIterator S(DefReg, TRI, true); S.isValid(); ++S)
SuccBB->removeLiveIn(*S);
for (auto U : UsedOpsInCopy) {
- Register Reg = MI->getOperand(U).getReg();
- if (!SuccBB->isLiveIn(Reg))
- SuccBB->addLiveIn(Reg);
+ Register SrcReg = MI->getOperand(U).getReg();
+ LaneBitmask Mask;
+ for (MCRegUnitMaskIterator S(SrcReg, TRI); S.isValid(); ++S) {
+ Mask |= (*S).second;
+ }
+ SuccBB->addLiveIn(SrcReg, Mask.any() ? Mask : LaneBitmask::getAll());
}
+ SuccBB->sortUniqueLiveIns();
}
static bool hasRegisterDependency(MachineInstr *MI,
OpenPOWER on IntegriCloud