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authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2015-10-02 12:45:37 +0000
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2015-10-02 12:45:37 +0000
commitcb334561223f931c0ecd580a50ec80ee24266842 (patch)
tree9aa1019197681c701c05d5bc65f4071e911104a5 /llvm/lib/CodeGen/MachineScheduler.cpp
parentb285e9e0d2faa84e6404ddc6aa9b54e0c2981c39 (diff)
downloadbcm5719-llvm-cb334561223f931c0ecd580a50ec80ee24266842.tar.gz
bcm5719-llvm-cb334561223f931c0ecd580a50ec80ee24266842.zip
[FastISel][x86] Teach how to select SSE2/AVX bitcasts between 128/256-bit vector types.
This patch teaches FastIsel the following two things: 1) On SSE2, no instructions are needed for bitcasts between 128-bit vector types; 2) On AVX, no instructions are needed for bitcasts between 256-bit vector types. Example: %1 = bitcast <4 x i31> %V to <2 x i64> Before (-fast-isel -fast-isel-abort=1): FastIsel miss: %1 = bitcast <4 x i31> %V to <2 x i64> Now we don't fall back to SelectionDAG and we correctly fold that computation propagating the register associated to %V. Differential Revision: http://reviews.llvm.org/D13347 llvm-svn: 249121
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
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