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author | Andrew Trick <atrick@apple.com> | 2012-05-24 22:11:05 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2012-05-24 22:11:05 +0000 |
commit | ca47335461336d4046fec9766a8bcf86687604db (patch) | |
tree | d3e3ba8eeb3c1c526a27d9fe97ac23778e71dfdf /llvm/lib/CodeGen/MachineScheduler.cpp | |
parent | dd375dd34a1e1a2b3e1dcd3aab1dfb97cc2d8fa4 (diff) | |
download | bcm5719-llvm-ca47335461336d4046fec9766a8bcf86687604db.tar.gz bcm5719-llvm-ca47335461336d4046fec9766a8bcf86687604db.zip |
misched: Release bottom roots in reverse order.
llvm-svn: 157426
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineScheduler.cpp | 32 |
1 files changed, 23 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp index 9edb93a2c11..30ae42d8bf8 100644 --- a/llvm/lib/CodeGen/MachineScheduler.cpp +++ b/llvm/lib/CodeGen/MachineScheduler.cpp @@ -396,6 +396,8 @@ protected: void moveInstruction(MachineInstr *MI, MachineBasicBlock::iterator InsertPos); bool checkSchedLimit(); + void releaseRoots(); + void releaseSucc(SUnit *SU, SDep *SuccEdge); void releaseSuccessors(SUnit *SU); void releasePred(SUnit *SU, SDep *PredEdge); @@ -554,6 +556,26 @@ updateScheduledPressure(std::vector<unsigned> NewMaxPressure) { } } +// Release all DAG roots for scheduling. +void ScheduleDAGMI::releaseRoots() { + SmallVector<SUnit*, 16> BotRoots; + + for (std::vector<SUnit>::iterator + I = SUnits.begin(), E = SUnits.end(); I != E; ++I) { + // A SUnit is ready to top schedule if it has no predecessors. + if (I->Preds.empty()) + SchedImpl->releaseTopNode(&(*I)); + // A SUnit is ready to bottom schedule if it has no successors. + if (I->Succs.empty()) + BotRoots.push_back(&(*I)); + } + // Release bottom roots in reverse order so the higher priority nodes appear + // first. This is more natural and slightly more efficient. + for (SmallVectorImpl<SUnit*>::const_reverse_iterator + I = BotRoots.rbegin(), E = BotRoots.rend(); I != E; ++I) + SchedImpl->releaseBottomNode(*I); +} + /// schedule - Called back from MachineScheduler::runOnMachineFunction /// after setting up the current scheduling region. [RegionBegin, RegionEnd) /// only includes instructions that have DAG nodes, not scheduling boundaries. @@ -584,15 +606,7 @@ void ScheduleDAGMI::schedule() { releasePredecessors(&ExitSU); // Release all DAG roots for scheduling. - for (std::vector<SUnit>::iterator I = SUnits.begin(), E = SUnits.end(); - I != E; ++I) { - // A SUnit is ready to top schedule if it has no predecessors. - if (I->Preds.empty()) - SchedImpl->releaseTopNode(&(*I)); - // A SUnit is ready to bottom schedule if it has no successors. - if (I->Succs.empty()) - SchedImpl->releaseBottomNode(&(*I)); - } + releaseRoots(); CurrentTop = nextIfDebug(RegionBegin, RegionEnd); CurrentBottom = RegionEnd; |