summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/MachineScheduler.cpp
diff options
context:
space:
mode:
authorAndrew Trick <atrick@apple.com>2012-03-09 22:34:56 +0000
committerAndrew Trick <atrick@apple.com>2012-03-09 22:34:56 +0000
commitaf1bee7235c835102b9540d9400f44f88cdef60b (patch)
tree690b9cd1e111c876fffcfabc9e5c4d1712696a4e /llvm/lib/CodeGen/MachineScheduler.cpp
parent2a70e65436c728e9f01e1e162c9125ed7c86e78b (diff)
downloadbcm5719-llvm-af1bee7235c835102b9540d9400f44f88cdef60b.tar.gz
bcm5719-llvm-af1bee7235c835102b9540d9400f44f88cdef60b.zip
misched: handle scheduler that insert instructions at empty region boundaries.
And add comments, since this is obviously confusing. llvm-svn: 152445
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineScheduler.cpp15
1 files changed, 12 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index 5c44a0e24d6..8b70ae5350d 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -144,10 +144,18 @@ bool MachineScheduler::runOnMachineFunction(MachineFunction &mf) {
Scheduler->startBlock(MBB);
// Break the block into scheduling regions [I, RegionEnd), and schedule each
- // region as soon as it is discovered.
+ // region as soon as it is discovered. RegionEnd points the the scheduling
+ // boundary at the bottom of the region. The DAG does not include RegionEnd,
+ // but the region does (i.e. the next RegionEnd is above the previous
+ // RegionBegin). If the current block has no terminator then RegionEnd ==
+ // MBB->end() for the bottom region.
+ //
+ // The Scheduler may insert instructions during either schedule() or
+ // exitRegion(), even for empty regions. So the local iterators 'I' and
+ // 'RegionEnd' are invalid across these calls.
unsigned RemainingCount = MBB->size();
for(MachineBasicBlock::iterator RegionEnd = MBB->end();
- RegionEnd != MBB->begin();) {
+ RegionEnd != MBB->begin(); RegionEnd = Scheduler->begin()) {
// Avoid decrementing RegionEnd for blocks with no terminator.
if (RegionEnd != MBB->end()
|| TII->isSchedulingBoundary(llvm::prior(RegionEnd), MBB, *MF)) {
@@ -170,8 +178,8 @@ bool MachineScheduler::runOnMachineFunction(MachineFunction &mf) {
// Skip empty scheduling regions (0 or 1 schedulable instructions).
if (I == RegionEnd || I == llvm::prior(RegionEnd)) {
// Close the current region. Bundle the terminator if needed.
+ // This invalidates 'RegionEnd' and 'I'.
Scheduler->exitRegion();
- RegionEnd = I;
continue;
}
DEBUG(dbgs() << "MachineScheduling " << MF->getFunction()->getName()
@@ -181,6 +189,7 @@ bool MachineScheduler::runOnMachineFunction(MachineFunction &mf) {
dbgs() << " Remaining: " << RemainingCount << "\n");
// Schedule a region: possibly reorder instructions.
+ // This invalidates 'RegionEnd' and 'I'.
Scheduler->schedule();
// Close the current region.
OpenPOWER on IntegriCloud