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| author | Fangrui Song <maskray@google.com> | 2019-06-21 05:40:31 +0000 |
|---|---|---|
| committer | Fangrui Song <maskray@google.com> | 2019-06-21 05:40:31 +0000 |
| commit | dc8de6037c3aceb9663c7433bb09584fa8571032 (patch) | |
| tree | acb49acaa3d1a0428951451a091fcb4d0c79a464 /llvm/lib/CodeGen/MachinePipeliner.cpp | |
| parent | d5e1ce3f44b0bef1eadbef9828b87a8918a82669 (diff) | |
| download | bcm5719-llvm-dc8de6037c3aceb9663c7433bb09584fa8571032.tar.gz bcm5719-llvm-dc8de6037c3aceb9663c7433bb09584fa8571032.zip | |
Simplify std::lower_bound with llvm::{bsearch,lower_bound}. NFC
llvm-svn: 364006
Diffstat (limited to 'llvm/lib/CodeGen/MachinePipeliner.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachinePipeliner.cpp | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp index 87ece444fec..570ed4aadab 100644 --- a/llvm/lib/CodeGen/MachinePipeliner.cpp +++ b/llvm/lib/CodeGen/MachinePipeliner.cpp @@ -3726,9 +3726,8 @@ void SwingSchedulerDAG::checkValidNodeOrder(const NodeSetType &Circuits) const { for (SDep &PredEdge : SU->Preds) { SUnit *PredSU = PredEdge.getSUnit(); - unsigned PredIndex = - std::get<1>(*std::lower_bound(Indices.begin(), Indices.end(), - std::make_pair(PredSU, 0), CompareKey)); + unsigned PredIndex = std::get<1>( + *llvm::lower_bound(Indices, std::make_pair(PredSU, 0), CompareKey)); if (!PredSU->getInstr()->isPHI() && PredIndex < Index) { PredBefore = true; Pred = PredSU; @@ -3743,9 +3742,8 @@ void SwingSchedulerDAG::checkValidNodeOrder(const NodeSetType &Circuits) const { // return Indices.end(). if (SuccSU->isBoundaryNode()) continue; - unsigned SuccIndex = - std::get<1>(*std::lower_bound(Indices.begin(), Indices.end(), - std::make_pair(SuccSU, 0), CompareKey)); + unsigned SuccIndex = std::get<1>( + *llvm::lower_bound(Indices, std::make_pair(SuccSU, 0), CompareKey)); if (!SuccSU->getInstr()->isPHI() && SuccIndex < Index) { SuccBefore = true; Succ = SuccSU; @@ -3756,9 +3754,8 @@ void SwingSchedulerDAG::checkValidNodeOrder(const NodeSetType &Circuits) const { if (PredBefore && SuccBefore && !SU->getInstr()->isPHI()) { // instructions in circuits are allowed to be scheduled // after both a successor and predecessor. - bool InCircuit = std::any_of( - Circuits.begin(), Circuits.end(), - [SU](const NodeSet &Circuit) { return Circuit.count(SU); }); + bool InCircuit = llvm::any_of( + Circuits, [SU](const NodeSet &Circuit) { return Circuit.count(SU); }); if (InCircuit) LLVM_DEBUG(dbgs() << "In a circuit, predecessor ";); else { |
