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author | Sumanth Gundapaneni <sgundapa@codeaurora.org> | 2018-10-11 19:45:07 +0000 |
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committer | Sumanth Gundapaneni <sgundapa@codeaurora.org> | 2018-10-11 19:45:07 +0000 |
commit | 77418a37537c42bb7db5f6b846aba15cfe2edf79 (patch) | |
tree | f4bf633118b7da75e3f1b6515d72304eb0e565e9 /llvm/lib/CodeGen/MachinePipeliner.cpp | |
parent | 8916e438c487e9a31b204345c3b62cebb3ea96fd (diff) | |
download | bcm5719-llvm-77418a37537c42bb7db5f6b846aba15cfe2edf79.tar.gz bcm5719-llvm-77418a37537c42bb7db5f6b846aba15cfe2edf79.zip |
[Pipeliner] Use the Index from Topo instead of relying on NodeNum. (NFC)
In future, if we may add any new DAG mutations other than artificial dependencies,
the NodeNum may not be valid. Instead the index from topological schedule DAG can be
used as long as we update it with the DAG change.
Differential Revision: https://reviews.llvm.org/D53104
llvm-svn: 344283
Diffstat (limited to 'llvm/lib/CodeGen/MachinePipeliner.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachinePipeliner.cpp | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp index 1109be15077..02344225391 100644 --- a/llvm/lib/CodeGen/MachinePipeliner.cpp +++ b/llvm/lib/CodeGen/MachinePipeliner.cpp @@ -278,12 +278,21 @@ class SwingSchedulerDAG : public ScheduleDAGInstrs { BitVector Blocked; SmallVector<SmallPtrSet<SUnit *, 4>, 10> B; SmallVector<SmallVector<int, 4>, 16> AdjK; + // Node to Index from ScheduleDAGTopologicalSort + std::vector<int> *Node2Idx; unsigned NumPaths; static unsigned MaxPaths; public: - Circuits(std::vector<SUnit> &SUs) - : SUnits(SUs), Blocked(SUs.size()), B(SUs.size()), AdjK(SUs.size()) {} + Circuits(std::vector<SUnit> &SUs, ScheduleDAGTopologicalSort &Topo) + : SUnits(SUs), Blocked(SUs.size()), B(SUs.size()), AdjK(SUs.size()) { + Node2Idx = new std::vector<int>(SUs.size()); + unsigned Idx = 0; + for (const auto &NodeNum : Topo) + Node2Idx->at(NodeNum) = Idx++; + } + + ~Circuits() { delete Node2Idx; } /// Reset the data structures used in the circuit algorithm. void reset() { @@ -1562,7 +1571,8 @@ bool SwingSchedulerDAG::Circuits::circuit(int V, int S, NodeSetType &NodeSets, ++NumPaths; break; } else if (!Blocked.test(W)) { - if (circuit(W, S, NodeSets, W < V ? true : HasBackedge)) + if (circuit(W, S, NodeSets, + Node2Idx->at(W) < Node2Idx->at(V) ? true : HasBackedge)) F = true; } } @@ -1602,7 +1612,7 @@ void SwingSchedulerDAG::findCircuits(NodeSetType &NodeSets) { // but we do this to find the circuits, and then change them back. swapAntiDependences(SUnits); - Circuits Cir(SUnits); + Circuits Cir(SUnits, Topo); // Create the adjacency structure. Cir.createAdjacencyStructure(this); for (int i = 0, e = SUnits.size(); i != e; ++i) { |