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| author | John Brawn <john.brawn@arm.com> | 2015-03-20 17:20:07 +0000 |
|---|---|---|
| committer | John Brawn <john.brawn@arm.com> | 2015-03-20 17:20:07 +0000 |
| commit | 1f26a47630b190056716b0a3ba062f230d255bcf (patch) | |
| tree | 2f82b305f0a989ea7a1293659f668f21990b1e5b /llvm/lib/CodeGen/MachineLoopInfo.cpp | |
| parent | c403a1ce323b9a20fcfd928152da8c59321d2a75 (diff) | |
| download | bcm5719-llvm-1f26a47630b190056716b0a3ba062f230d255bcf.tar.gz bcm5719-llvm-1f26a47630b190056716b0a3ba062f230d255bcf.zip | |
[ARM] Fix handling of thumb1 out-of-range frame offsets
LocalStackSlotPass assumes that isFrameOffsetLegal doesn't change its
answer when the base register changes. Unfortunately this isn't true
in thumb1, where SP-based loads allow a larger offset than
non-SP-based loads, and this causes the base register reuse code to
generate instructions that are unencodable, causing an assertion
failure.
Solve this by adding a BaseReg parameter to isFrameOffsetLegal, which
ARMBaseRegisterInfo can then make use of to give the correct answer.
Differential Revision: http://reviews.llvm.org/D8419
llvm-svn: 232825
Diffstat (limited to 'llvm/lib/CodeGen/MachineLoopInfo.cpp')
0 files changed, 0 insertions, 0 deletions
