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authorBill Wendling <isanbard@gmail.com>2007-12-11 19:17:04 +0000
committerBill Wendling <isanbard@gmail.com>2007-12-11 19:17:04 +0000
commit7717a8a37d61cfb7b042c9225edb015257fbd80f (patch)
tree16b2739ccbe16101407dabbe475b8656556cbaaf /llvm/lib/CodeGen/MachineLICM.cpp
parent3b5dca2533d560dbafee6f6cccc066557bb99a26 (diff)
downloadbcm5719-llvm-7717a8a37d61cfb7b042c9225edb015257fbd80f.tar.gz
bcm5719-llvm-7717a8a37d61cfb7b042c9225edb015257fbd80f.zip
- Update the virtual reg to machine instruction map when hoisting.
- Fix subtle bug when creating initially creating this map. llvm-svn: 44873
Diffstat (limited to 'llvm/lib/CodeGen/MachineLICM.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineLICM.cpp14
1 files changed, 12 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index b158e90f16e..b5a00848a23 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -215,7 +215,7 @@ void MachineLICM::MapVirtualRegisterDefs(const MachineFunction &MF) {
const MachineInstr &MI = *II;
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
- const MachineOperand &MO = MI.getOperand(0);
+ const MachineOperand &MO = MI.getOperand(i);
if (MO.isRegister() && MO.isDef() &&
MRegisterInfo::isVirtualRegister(MO.getReg()))
@@ -317,7 +317,17 @@ void MachineLICM::Hoist(MachineInstr &MI) {
"The predecessor doesn't feed directly into the loop header!");
// Now move the instructions to the predecessor.
- MoveInstToEndOfBlock(MBB, MI.clone());
+ MachineInstr *NewMI = MI.clone();
+ MoveInstToEndOfBlock(MBB, NewMI);
+
+ // Update VRegDefs.
+ for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
+ const MachineOperand &MO = NewMI->getOperand(i);
+
+ if (MO.isRegister() && MO.isDef() &&
+ MRegisterInfo::isVirtualRegister(MO.getReg()))
+ VRegDefs[MO.getReg()] = NewMI;
+ }
// Hoisting was successful! Remove bothersome instruction now.
MI.getParent()->remove(&MI);
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