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| author | Craig Topper <craig.topper@gmail.com> | 2012-03-04 10:43:23 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-03-04 10:43:23 +0000 |
| commit | 1d3265887755f2eac986407343dc7447948e9a72 (patch) | |
| tree | c0af8f45958150e8a5b2f31d2b67a2ac236182ae /llvm/lib/CodeGen/MachineLICM.cpp | |
| parent | dc2cada889b3bcf652fd8f356e2b96cea8e6e228 (diff) | |
| download | bcm5719-llvm-1d3265887755f2eac986407343dc7447948e9a72.tar.gz bcm5719-llvm-1d3265887755f2eac986407343dc7447948e9a72.zip | |
Use uint16_t to store register overlaps to reduce static data.
llvm-svn: 152001
Diffstat (limited to 'llvm/lib/CodeGen/MachineLICM.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineLICM.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp index 8014fec38a2..428a9d9bde5 100644 --- a/llvm/lib/CodeGen/MachineLICM.cpp +++ b/llvm/lib/CodeGen/MachineLICM.cpp @@ -434,7 +434,7 @@ void MachineLICM::ProcessMI(MachineInstr *MI, } if (MO.isImplicit()) { - for (const unsigned *AS = TRI->getOverlaps(Reg); *AS; ++AS) + for (const uint16_t *AS = TRI->getOverlaps(Reg); *AS; ++AS) PhysRegClobbers.set(*AS); if (!MO.isDead()) // Non-dead implicit def? This cannot be hoisted. @@ -454,7 +454,7 @@ void MachineLICM::ProcessMI(MachineInstr *MI, // If we have already seen another instruction that defines the same // register, then this is not safe. Two defs is indicated by setting a // PhysRegClobbers bit. - for (const unsigned *AS = TRI->getOverlaps(Reg); *AS; ++AS) { + for (const uint16_t *AS = TRI->getOverlaps(Reg); *AS; ++AS) { if (PhysRegDefs.test(*AS)) PhysRegClobbers.set(*AS); if (PhysRegClobbers.test(*AS)) @@ -502,7 +502,7 @@ void MachineLICM::HoistRegionPostRA() { for (MachineBasicBlock::livein_iterator I = BB->livein_begin(), E = BB->livein_end(); I != E; ++I) { unsigned Reg = *I; - for (const unsigned *AS = TRI->getOverlaps(Reg); *AS; ++AS) + for (const uint16_t *AS = TRI->getOverlaps(Reg); *AS; ++AS) PhysRegDefs.set(*AS); } |

