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| author | Kyle Butt <kyle+llvm@iteratee.net> | 2016-06-23 21:38:49 +0000 |
|---|---|---|
| committer | Kyle Butt <kyle+llvm@iteratee.net> | 2016-06-23 21:38:49 +0000 |
| commit | 178314ab521cd6da4d16707315b79d96247e7479 (patch) | |
| tree | 183da566b0c2842cfe6b45b281f5b22d3f83a755 /llvm/lib/CodeGen/MachineLICM.cpp | |
| parent | d29d31e30ef67b0d465160c1f07d5b6fc6bf88dd (diff) | |
| download | bcm5719-llvm-178314ab521cd6da4d16707315b79d96247e7479.tar.gz bcm5719-llvm-178314ab521cd6da4d16707315b79d96247e7479.zip | |
Codegen: LICM Remove check for exactly 1 register def.
When considering whether to split an instruction with a memory operand
into an explicit load and a register-based instruction, we currently
check that the resulting instruction has exactly 1 def. This prevents 2
important LICM optimizations: compares with memory operands, and double
indirect calls. All the tests and the test-suite pass without the check.
My guess as to original intent is to limit the additional register pressure
created by the new instruction, but given that we only split out a single
register, it is already limited.
The licm-dominance test now checks actual memory loads for hoisting instead of
undef, and it tests compares.
hoist-invariant-load.ll now checks for 2 hoists, the intended hoist, and a bonus
from calling a got-relative function in a loop.
llvm-svn: 273616
Diffstat (limited to 'llvm/lib/CodeGen/MachineLICM.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineLICM.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp index 00dec821158..a6f1c7519c6 100644 --- a/llvm/lib/CodeGen/MachineLICM.cpp +++ b/llvm/lib/CodeGen/MachineLICM.cpp @@ -1171,7 +1171,6 @@ MachineInstr *MachineLICM::ExtractHoistableLoad(MachineInstr *MI) { &LoadRegIndex); if (NewOpc == 0) return nullptr; const MCInstrDesc &MID = TII->get(NewOpc); - if (MID.getNumDefs() != 1) return nullptr; MachineFunction &MF = *MI->getParent()->getParent(); const TargetRegisterClass *RC = TII->getRegClass(MID, LoadRegIndex, TRI, MF); // Ok, we're unfolding. Create a temporary register and do the unfold. |

