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authorTim Northover <tnorthover@apple.com>2015-04-07 22:49:47 +0000
committerTim Northover <tnorthover@apple.com>2015-04-07 22:49:47 +0000
commit5b44f1ba199d78bb3e5319fc7958d0a2ba90c168 (patch)
tree4ad99832bc542efeeb00cb0b23ab12077ca5765c /llvm/lib/CodeGen/MachineInstrBundle.cpp
parent9a736cf29fc13c6330e0c7d43dec15168fe14b1f (diff)
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AArch64: disallow "fmov sD, #-0.0" during assembly.
We weren't checking the sign of the floating point immediate before translating it to "fmov sD, wzr". Similarly for D-regs. Technically "movi vD.2s, #0x80, lsl #24" would work most of the time, but it's not a blessed alias (and I don't think it should be since people expect writing sD to zero out the high lanes, and there's no dD equivalent). So an error it is. rdar://20455398 llvm-svn: 234372
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstrBundle.cpp')
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