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| author | Dan Gohman <gohman@apple.com> | 2008-01-31 00:25:39 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-01-31 00:25:39 +0000 |
| commit | 3646fdda6707fbb34ea65eb399bac3f90362cd53 (patch) | |
| tree | 177a8f313c73c506f560460aefc6871160ba08da /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | b5474fc5298eff8caf93e54d4af1b55f4113d892 (diff) | |
| download | bcm5719-llvm-3646fdda6707fbb34ea65eb399bac3f90362cd53.tar.gz bcm5719-llvm-3646fdda6707fbb34ea65eb399bac3f90362cd53.zip | |
Create a new class, MemOperand, for describing memory references
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
llvm-svn: 46585
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 757b3bdbc2d..8aa854db72a 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -15,6 +15,8 @@ #include "llvm/Value.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/PseudoSourceValue.h" +#include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetInstrDesc.h" #include "llvm/Target/MRegisterInfo.h" @@ -291,6 +293,7 @@ MachineInstr::MachineInstr(const MachineInstr &MI) { TID = &MI.getDesc(); NumImplicitOps = MI.NumImplicitOps; Operands.reserve(MI.getNumOperands()); + MemOperands = MI.MemOperands; // Add operands for (unsigned i = 0; i != MI.getNumOperands(); ++i) { @@ -620,6 +623,34 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const { getOperand(i).print(OS, TM); } + if (getNumMemOperands() > 0) { + OS << ", SV:"; + for (unsigned i = 0; i < getNumMemOperands(); i++) { + const MemOperand &MRO = getMemOperand(i); + const Value *V = MRO.getValue(); + + assert(V && "SV missing."); + assert((MRO.isLoad() || MRO.isStore()) && + "SV has to be a load, store or both."); + + if (MRO.isVolatile()) + OS << "Volatile"; + if (MRO.isLoad()) + OS << "LD"; + if (MRO.isStore()) + OS << "ST"; + + OS << MRO.getSize(); + + if (!V->getName().empty()) + OS << "[" << V->getName() << " + " << MRO.getOffset() << "]"; + else if (isa<PseudoSourceValue>(V)) + OS << "[" << *V << " + " << MRO.getOffset() << "]"; + else + OS << "[" << V << " + " << MRO.getOffset() << "]"; + } + } + OS << "\n"; } |

