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authorAlkis Evlogimenos <alkis@evlogimenos.com>2004-02-04 22:17:40 +0000
committerAlkis Evlogimenos <alkis@evlogimenos.com>2004-02-04 22:17:40 +0000
commit327426411ec0e91bd0481a31786d0409a35f3a1a (patch)
treef0fc962b14a69aa04ab854b8ea7501515d13f376 /llvm/lib/CodeGen/MachineInstr.cpp
parent39ad6f2772684cffca3d636c06b2d6e3830bdf8e (diff)
downloadbcm5719-llvm-327426411ec0e91bd0481a31786d0409a35f3a1a.tar.gz
bcm5719-llvm-327426411ec0e91bd0481a31786d0409a35f3a1a.zip
Modify the two address instruction pass to remove the duplicate
operand of the instruction and thus simplify the register allocation. llvm-svn: 11124
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp18
1 files changed, 0 insertions, 18 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 869d963d53d..9d7b1b2d99f 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -27,24 +27,6 @@ namespace llvm {
//
extern const TargetInstrDescriptor *TargetInstrDescriptors;
-bool MachineOperand::isEverUsed(const MachineInstr& mi) const
-{
- for (int i = 0, e = mi.getNumOperands(); i != e; ++i) {
- if (*this == mi.getOperand(i) && mi.getOperand(i).isUse())
- return true;
- }
- return false;
-}
-
-bool MachineOperand::isEverDefined(const MachineInstr& mi) const
-{
- for (int i = 0, e = mi.getNumOperands(); i != e; ++i) {
- if (*this == mi.getOperand(i) && mi.getOperand(i).isDef())
- return true;
- }
- return false;
-}
-
// Constructor for instructions with variable #operands
MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands)
: opCode(OpCode),
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