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| author | Sanjay Patel <spatel@rotateright.com> | 2015-01-27 20:50:27 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2015-01-27 20:50:27 +0000 |
| commit | bcf62f2fa24b4b6c52f5dd04fc735e19f2b9aeeb (patch) | |
| tree | 00c06c8bb465419c2b4750dfc4512f5f3a924662 /llvm/lib/CodeGen/MachineFunctionAnalysis.cpp | |
| parent | fcb14ad7a3a17dc00eebf07a34c4b17ed3b15004 (diff) | |
| download | bcm5719-llvm-bcf62f2fa24b4b6c52f5dd04fc735e19f2b9aeeb.tar.gz bcm5719-llvm-bcf62f2fa24b4b6c52f5dd04fc735e19f2b9aeeb.zip | |
Merge vector stores into wider vector stores (PR21711)
This patch resolves part of PR21711 ( http://llvm.org/bugs/show_bug.cgi?id=21711 ).
The 'f3' test case in that report presents a situation where we have two 128-bit
stores extracted from a 256-bit source vector.
Instead of producing this:
vmovaps %xmm0, (%rdi)
vextractf128 $1, %ymm0, 16(%rdi)
This patch merges the 128-bit stores into a single 256-bit store:
vmovups %ymm0, (%rdi)
Differential Revision: http://reviews.llvm.org/D7208
llvm-svn: 227242
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunctionAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions

