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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2015-11-17 20:08:31 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2015-11-17 20:08:31 +0000
commit36b8626b0067a0ee2893377a0caccd50fc6dd741 (patch)
treecbf6afaf42159f2775bd4321e3ba9fbe63f359a9 /llvm/lib/CodeGen/MachineFunction.cpp
parent0dd18316fd75a0a5f7610cf5015f226a4fcfb9b8 (diff)
downloadbcm5719-llvm-36b8626b0067a0ee2893377a0caccd50fc6dd741.tar.gz
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[RuntimeDyld] Fix resolving R_PPC64_REL24 relocations
When resolving R_PPC64_REL24, code used to check for an address delta that fits in 24 bits, while the instructions that take this relocation actually can process address deltas that fit into *26* bits (as those instructions have a 24 bit field, but implicitly append two zero bits at the end since all instruction addresses are a multiple of 4). This means that code would signal overflow once a single object's text section exceeds 8 MB, while we can actually support up to 32 MB. Partially fixes PR25540. llvm-svn: 253369
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