diff options
author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2019-02-04 12:51:26 +0000 |
---|---|---|
committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2019-02-04 12:51:26 +0000 |
commit | edbf06a76771f77f70ad6ee1b4641a2d53c14152 (patch) | |
tree | 470ba327830e755baa528289fbc4a6d454f92f1e /llvm/lib/CodeGen/MachineCombiner.cpp | |
parent | fb222aa31950e7338f17b73a9490657f53e703ae (diff) | |
download | bcm5719-llvm-edbf06a76771f77f70ad6ee1b4641a2d53c14152.tar.gz bcm5719-llvm-edbf06a76771f77f70ad6ee1b4641a2d53c14152.zip |
[AsmPrinter] Remove hidden flag -print-schedule.
This patch removes hidden codegen flag -print-schedule effectively reverting the
logic originally committed as r300311
(https://llvm.org/viewvc/llvm-project?view=revision&revision=300311).
Flag -print-schedule was originally introduced by r300311 to address PR32216
(https://bugs.llvm.org/show_bug.cgi?id=32216). That bug was about adding "Better
testing of schedule model instruction latencies/throughputs".
These days, we can use llvm-mca to test scheduling models. So there is no longer
a need for flag -print-schedule in LLVM. The main use case for PR32216 is
now addressed by llvm-mca.
Flag -print-schedule is mainly used for debugging purposes, and it is only
actually used by x86 specific tests. We already have extensive (latency and
throughput) tests under "test/tools/llvm-mca" for X86 processor models. That
means, most (if not all) existing -print-schedule tests for X86 are redundant.
When flag -print-schedule was first added to LLVM, several files had to be
modified; a few APIs gained new arguments (see for example method
MCAsmStreamer::EmitInstruction), and MCSubtargetInfo/TargetSubtargetInfo gained
a couple of getSchedInfoStr() methods.
Method getSchedInfoStr() had to originally work for both MCInst and
MachineInstr. The original implmentation of getSchedInfoStr() introduced a
subtle layering violation (reported as PR37160 and then fixed/worked-around by
r330615).
In retrospect, that new API could have been designed more optimally. We can
always query MCSchedModel to get the latency and throughput. More importantly,
the "sched-info" string should not have been generated by the subtarget.
Note, r317782 fixed an issue where "print-schedule" didn't work very well in the
presence of inline assembly. That commit is also reverted by this change.
Differential Revision: https://reviews.llvm.org/D57244
llvm-svn: 353043
Diffstat (limited to 'llvm/lib/CodeGen/MachineCombiner.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineCombiner.cpp | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/MachineCombiner.cpp b/llvm/lib/CodeGen/MachineCombiner.cpp index 1b50b51dc5e..f35f1130817 100644 --- a/llvm/lib/CodeGen/MachineCombiner.cpp +++ b/llvm/lib/CodeGen/MachineCombiner.cpp @@ -558,16 +558,13 @@ bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) { continue; LLVM_DEBUG(if (dump_intrs) { - dbgs() << "\tFor the Pattern (" << (int)P << ") these instructions could be removed\n"; - for (auto const *InstrPtr : DelInstrs) { - dbgs() << "\t\t" << STI->getSchedInfoStr(*InstrPtr) << ": "; + dbgs() << "\tFor the Pattern (" << (int)P + << ") these instructions could be removed\n"; + for (auto const *InstrPtr : DelInstrs) InstrPtr->print(dbgs(), false, false, false, TII); - } dbgs() << "\tThese instructions could replace the removed ones\n"; - for (auto const *InstrPtr : InsInstrs) { - dbgs() << "\t\t" << STI->getSchedInfoStr(*InstrPtr) << ": "; + for (auto const *InstrPtr : InsInstrs) InstrPtr->print(dbgs(), false, false, false, TII); - } }); bool SubstituteAlways = false; |