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| author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2015-01-22 12:07:59 +0000 |
|---|---|---|
| committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2015-01-22 12:07:59 +0000 |
| commit | 150d9f3187252d6ca872456684ace1f958440ce1 (patch) | |
| tree | 3ade3e42b0508fe96280cabd76891a19bd12f84a /llvm/lib/CodeGen/MachineCombiner.cpp | |
| parent | 841572e90a124b6857714391e134dc0d456bbba0 (diff) | |
| download | bcm5719-llvm-150d9f3187252d6ca872456684ace1f958440ce1.tar.gz bcm5719-llvm-150d9f3187252d6ca872456684ace1f958440ce1.zip | |
Fixed a bug in type legalizer for masked load/store intrinsics.
The problem occurs when after vectorization we have type
<2 x i32>. This type is promoted to <2 x i64> and then requires
additional efforts for expanding loads and truncating stores.
I added EXPAND / TRUNCATE attributes to the masked load/store
SDNodes. The code now contains additional shuffles.
I've prepared changes in the cost estimation for masked memory
operations, it will be submitted separately.
llvm-svn: 226808
Diffstat (limited to 'llvm/lib/CodeGen/MachineCombiner.cpp')
0 files changed, 0 insertions, 0 deletions
