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| author | Roman Lebedev <lebedev.ri@gmail.com> | 2018-04-23 20:38:42 +0000 |
|---|---|---|
| committer | Roman Lebedev <lebedev.ri@gmail.com> | 2018-04-23 20:38:42 +0000 |
| commit | bf18cc56d3a58a2016767024b199a483d2083e8b (patch) | |
| tree | 048fe871a0a4a26cc93041c905d521783b7f3c7a /llvm/lib/CodeGen/MachineCSE.cpp | |
| parent | d134d2e50976dccc7684050fef1675c6576aef3e (diff) | |
| download | bcm5719-llvm-bf18cc56d3a58a2016767024b199a483d2083e8b.tar.gz bcm5719-llvm-bf18cc56d3a58a2016767024b199a483d2083e8b.zip | |
[X86][AArch64][NFC] Add tests for masked merge unfolding
Summary:
This is [[ https://bugs.llvm.org/show_bug.cgi?id=37104 | PR37104 ]].
[[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]] will introduce an IR canonicalization that is likely bad for the end assembly.
Previously, `andl`+`andn`/`andps`+`andnps` / `bic`/`bsl` would be generated. (see `@out`)
Now, they would no longer be generated (see `@in`).
I'm guessing `llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp` should be able to unfold this.
Reviewers: spatel, craig.topper, RKSimon, javed.absar
Reviewed By: spatel
Subscribers: nemanjai, rengolin, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D45563
llvm-svn: 330645
Diffstat (limited to 'llvm/lib/CodeGen/MachineCSE.cpp')
0 files changed, 0 insertions, 0 deletions
