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| author | Evan Cheng <evan.cheng@apple.com> | 2010-03-08 23:28:08 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-03-08 23:28:08 +0000 |
| commit | 6ec41ee33c55f9aa389643858571e569378e11c9 (patch) | |
| tree | 5789edf09e34520881696d2d99bd683766486dd2 /llvm/lib/CodeGen/MachineCSE.cpp | |
| parent | 0a4a8326c1027e6a7faa48eec5497e8189e7e159 (diff) | |
| download | bcm5719-llvm-6ec41ee33c55f9aa389643858571e569378e11c9.tar.gz bcm5719-llvm-6ec41ee33c55f9aa389643858571e569378e11c9.zip | |
Restrict machine cse to really trivial coalescing. Leave the heavy lifting to a real coalescer.
llvm-svn: 98007
Diffstat (limited to 'llvm/lib/CodeGen/MachineCSE.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineCSE.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp index b376e3d05fe..ce8ebbc6010 100644 --- a/llvm/lib/CodeGen/MachineCSE.cpp +++ b/llvm/lib/CodeGen/MachineCSE.cpp @@ -91,7 +91,10 @@ bool MachineCSE::PerformTrivialCoalescing(MachineInstr *MI, unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx; if (TII->isMoveInstr(*DefMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) && TargetRegisterInfo::isVirtualRegister(SrcReg) && + MRI->getRegClass(SrcReg) == MRI->getRegClass(Reg) && !SrcSubIdx && !DstSubIdx) { + DEBUG(dbgs() << "Coalescing: " << *DefMI); + DEBUG(dbgs() << "*** to: " << *MI); MO.setReg(SrcReg); DefMI->eraseFromParent(); ++NumCoalesces; |
